Innovation and Partnerships Office

Distributing Electronic Digital Clock Signals with Ultra-low Time Jitter 2016-011

APPLICATIONS OF TECHNOLOGY:

  • Distributed data acquisition systems
  • Medical imaging, e.g. PET
  • Particle physics detectors

ADVANTAGES:

  • Sub-10ps clock jitter at high speed data rates
  • Reduced complexity and cost compared to traditional systems 

ABSTRACT:

Large electronic systems with distributed components must be synchronized with extremely low time jitter, particularly when the timing between components is measured in picoseconds. Traditional systems distribute the clock through dedicated lines in a complex, costly system.

A Berkeley Lab research team led by Woon-Seng Choong has developed a new digital detector board (DDB) module that acquires and processes high-speed data from silicon photomultiplier (SiPM) arrays, with ultra-low time jitter and at a lower cost than traditional methods. Complexity is reduced and flexibility increased by using High Speed Serial Interface Transceivers found in modern field programmable gate arrays (FPGAs) to distribute the clock, data, and control signals using a single line, and a single processing unit. The Berkeley Lab technology opens new doors for DDBs to be used in time-sensitive applications that require precision and high resolution data transfers.

DEVELOPMENT STAGE: Proven principle. Researchers conducted multiple tests and achieved the best jitter – 7.5 picoseconds (ps) – using a 5-meter fiber optic cable with a transceiver running at 5Gbps data rates.

STATUS: Available for licensing or collaborative research.

SEE THESE OTHER BERKELEY LAB TECHNOLOGIES IN THIS FIELD:

Solid State Silicon Photomultiplier with High Photon Detection Efficiency, IB-3150