APPLICATIONS OF TECHNOLOGY:
- Quantum Computing
- High performance computing (HPC)
- Machine learning
- National security computing
BENEFITS:
- Implements both data and control paths using race logic
- Increases device performance per unit area
- Produces higher throughput per port per Josephson Junction compared to best performing state of the art on-chip networks
- Improved energy efficiency
BACKGROUND:
Superconducting computing takes advantage of the fact that some metals exhibit zero electrical resistance below a critical temperature. Josephson Junctions (JJs), the superconducting computing analog of transistors, are capable of switching with delays in the order of picoseconds, and operate with energies several orders of magnitude lower than CMOS.
A current challenge in superconducting computing is to eliminate the conversion of data between the temporal and binary domains in large-scale superconducting circuits. Eliminating this conversion will result in increased performance of superconducting computers.
TECHNOLOGY OVERVIEW:
Researchers at Berkeley Lab have developed a design method that enables the construction of an on-chip network using race logic, a computational model for which currently there are no network designs available.
Current superconducting circuits largely utilize conventional binary encoding, which encodes 0s and 1s in the absence or presence of voltage pulses, respectively. Race logic is a computing approach which manipulates signal delays rather than conventional binary logic levels, and encodes information in the time domain, which is a language more natural to superconducting computing than binary encoding. In this approach, the relative times of arrival of voltage pulses encode their values, which are then used to perform calculations. Race logic has shown orders of magnitude higher performance than conventional binary-encoded superconducting circuits.
This invention is the first on-chip network where both the data and control paths operate entirely in the time domain using race logic. This will eliminate the need for conversion between temporal and binary domains in large-scale superconducting chips. In addition, because race logic requires fewer wires to encode information, smaller circuits can be developed with higher operating frequencies than CMOS.
DEVELOPMENT STAGE: Proven principle
RELATED TECHNOLOGIES:
A New Design for RSFQ Superconducting Logic Computation Systems 2020-015
LBL PRINCIPAL INVESTIGATORS: Georgios Michelogiannakis, Darren Lyles, Dilip Vasusdevan, Patricia Gonzalez-Guerrero, Meriam Bautista.
STATUS: Patent pending
OPPORTUNITIES: Available for licensing or collaborative research
